Term of the Moment
DSRC
Redirected from: near-data computing
Definition: compute-in-memory
(1) For China's in-memory processing, see resistive random access memory.
(2) A combination processor and RAM in the same circuit. Also called "processing in memory," "memory-centric computing" and "in-memory computation," compute-in-memory systems are designed to handle huge amounts of parallel arithmetic calculations for AI and other math-intensive applications. For decades, numerous designs for this type of chip have been considered.
CPU <--bus--> Memory
The traditional computer architecture is a CPU connected to memory via a system bus. Data traverse this pathway back and forth and take a huge amount of time. As AI models grow larger, the goal of compute-in-memory is to handle matrix multiplications (multiply-and-add) in parallel at the highest speed possible. See matrix multiplication.
An Evolution
(2) A combination processor and RAM in the same circuit. Also called "processing in memory," "memory-centric computing" and "in-memory computation," compute-in-memory systems are designed to handle huge amounts of parallel arithmetic calculations for AI and other math-intensive applications. For decades, numerous designs for this type of chip have been considered.
CPU <--bus--> Memory
The traditional computer architecture is a CPU connected to memory via a system bus. Data traverse this pathway back and forth and take a huge amount of time. As AI models grow larger, the goal of compute-in-memory is to handle matrix multiplications (multiply-and-add) in parallel at the highest speed possible. See matrix multiplication.
As of 2026, various chips are built with DRAM memory and logic (CPU) on the same substrate as in the TSMC example on top (see TSMC 3DFabric). However, the goal is to connect the bare dies of CPU, GPU and memory on the same substrate using through-silicon vias (TSVs) as in the bottom example. See via and die. (Top image courtesy of TSMC; bottom image created by ChatGPT.)