Term of the Moment
gig economy
Definition: active area
The active area, from five to 100 nanometers (nm) deep, is the layer of transistors in a chip where all the switching takes place. In the future, 3D stacking of transistors will create deeper active areas because a chip will have multiple transistor layers (see CFET). See chip, half-adder and Boolean logic.
Entirely Magical
No man-made object is more incredible than the chip. Today's state-of-the-art CPUs and SoCs contain billions of transistors, many millions of which are simultaneously switching their state from on to off and off to on every second. In fact, so many transistors are changing at the same time that there can be quadrillions and quintillions of transistor state changes taking place every second. Think about that number... quadrillions and quintillions of changes every second for hours on end in digital perfection. See head of a pin, transistor and SoC.
A Digital Miracle
There Are Many Layers on a Chip
Entirely Magical
No man-made object is more incredible than the chip. Today's state-of-the-art CPUs and SoCs contain billions of transistors, many millions of which are simultaneously switching their state from on to off and off to on every second. In fact, so many transistors are changing at the same time that there can be quadrillions and quintillions of transistor state changes taking place every second. Think about that number... quadrillions and quintillions of changes every second for hours on end in digital perfection. See head of a pin, transistor and SoC.
When people look at a chip package like this, they see an object about the size of a cracker. However, the active transistor area may be larger or smaller in width and depth than the postage stamp, but it is considerably thinner. The transistor layer combined with all the metal interconnection layers can be as thick as 50,000 nanometers (nm). A postage stamp is 700,000 to 900,000 nm thick. See microcontroller and chip package.
Because all the transistors cannot connect to each other on a single layer, multiple "metal layers" provide all the interconnections. Compare the roughly 50,000-nanometer thickness of all the layers in a chip with a single human hair, which is 500,000 to 1,000,000 nanometers in diameter. See process technology.