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Definition: VHDL

(VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. Initially conceived as a documentation language only, most of the language can today be used for simulation and logic synthesis. VHDL became the IEEE 1076 standard in 1987, but was initially developed for the U.S. military's VHSIC program in 1981. See Verilog and RTL.

HDL Languages
VHDL and Verilog are the most popular HDLs. These examples show a circuit described in RTL in both languages and the resulting schematic of the gate level netlist created after synthesis (below). (Language and schematic examples from "HDL Chip Design" courtesy of Douglas J. Smith.)