A type of 3D FinFET transistor from Intel introduced in 2011 with its Ivy Bridge microarchitecture. The Tri-Gate design is considered 3D because the gate wraps around a raised source-to-drain channel, called a "fin," instead of residing on top of the channel in the traditional 2D planar design. In addition, multiple fins are used, which provide greater control of each state.
Fins Everywhere: SuperFin and Enhanced SuperFin
The "fin" moniker is used in Intel's SuperFin and Enhanced SuperFin transistors, all evolving from the FinFET and Tri-Gate transistors (see FinFET
). See Ivy Bridge
and transistor concept
Because the gate wraps around the fin (channel), the Tri-Gate transistor provides greater performance and less current leakage. Multiple fins are ganged together through the same gate to enable more current in the "on" state and less current in the "off" state. (Images courtesy of Intel Corporation.)
Six Fins Each
The matrix (center) on this chip is an actual image of three transistors and six fins. The drains from the first become the sources for the second, and so on. Metal layers interconnect all the source, drain and gate elements to complete the circuit design. (Image courtesy of Intel Corporation.)